1. Field of the Invention
This invention relates to metal-insulator-metal (MIM) capacitor structures and more particularly to a device comprising an MIM capacitor structure and adjacent metal gate electrode CMOS transistor and a method for forming the same in parallel to reduce a processing cost, improve a process flow, and improve both MIM capacitor and CMOS transistor performance in high speed applications.
2. Description of the Related Art
Advances in technology have resulted in an increasing demand for system-on-chip products where both analog and digital signal processing are desirable. Increasingly it is advantageous for both the analog circuitry and digital circuitry to be in close proximity. For example, digital and analog circuitry blocks operating together are referred to as mixed mode systems.
Polysilicon-insulator-polysilicon (PIP) capacitors are well known in the art and have been used in conventional mixed mode systems. Formation of PIP capacitors is, however, problematic in CMOS process technologies used to form a logic circuit on an adjacent region of a chip. In addition, PIP capacitors have unacceptable performance including unstable capacitance with varying applied voltages, primarily due to carrier depletion effects. Moreover, PIP capacitors have the additional shortcoming of difficult scale down as well as exhibiting poor performance in high speed applications. Thus, these and other shortcomings make PIP capacitors undesirable for use in future mixed mode circuitry applications.
Metal-insulator-metal (MIM) capacitors have been found to have improved performance over PIP capacitors. Several conventional difficulties conventional processes remain to be overcome. For example, MIM capacitors are generally formed as BEOL processes, adding to processing steps and cost, as well as presenting process integration challenges with both FEOL and BEOL CMOS processes including damascene interconnect processes.
Many analog and mixed mode systems rely on precise reproducibility in the electronic properties of circuit component structures, such as MIM capacitor structures, to achieve the electrical matching of the various circuitry components. Electronic mismatching of circuitry components results in degraded signal processing quality and is adversely affected by deviations in critical dimensions between components. Critical dimension deviation is typically exacerbated by the increased number of processing steps required for producing a component, such as a MIM capacitor in a BEOL process.
Thus, an improved MIM capacitor structure and manufacturing process achieving reduced cost and improved performance of both MIM capacitors and CMOS transistors including mixed mode systems is desirable.